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TM 32-5811-024-14&P
command status words. The word, selected by digital processor test set CMD 1/CMD 2 switch S15, is serially transferred
into the communication processor control-indicator interface CCA A20, which formats this word for further transfer to the
communication processor digital processor. The digital processor responds by generating a 16-bit acknowledgment
word, which is formatted and serially transferred to lamp driver CCA A8.
Lamp driver CCA A8 formats the serial input into a parallel word that drives the digital processor test set COMMAND
DISPLAY OCTAL DISPLAY. Presentation of the correct octal code on the COMMAND DISPLAY verifies proper
operation of the communication processor control indicator interface circuits.
Table 5-4 shows the 32-bit STATUS/CMD word applied to logic control CCA A7 as a result of switching the digital
processor test set COMM. PROC. TEST CMD 1/CMD 2 switch.
b. Detailed Description. Figure FO-5 shows the major components of logic control CCA A7, lamp driver CCA A8,
digital processor test set, and communication processor, which perform the communication processor control-indicator
interface test. Circuit activity occurs according to the following events:
(1) Time state T0. (See figure 5-7) Setting the front-panel TEST switch (S17) sets the TEST latch on CCA A7.
Setting the XMIT (S16) switch sets the XMIT latch. If either or both switches are set, the following sequence is
accomplished:
(a) U8A is driven high to provide a high D input to CLR latch U2.
(b) Bit 32 or bit 31 is set to a negative logic 1.
(c) +IHUD (indicator high update) is activated low.
The low IHUD signal is applied to control-indicator CCA A20 to initiate the 32-bit STATUS/CMD word transfer sequence.
Table 5-4. Test Status/CMD Word
5-19
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