Table 5-3. Typical Digital Processor Control Sequence

TM 32-5811-024-14&P

Table 5-3. Typical Digital Processor Control Sequence

Switch

Circuit Activity

HALT (S3)

A low HALT signal is sent to the unit-under-test

processor timing CCA. This input sets a HALT latch and

freezes the digital processor.

A negative true 16-bit binary address, ASW0 thru

ADDRESS switches (S22 thru S27) (set to desired octal

address on CPU CONTROL PANEL)

ASW15, is sent to address multiplexers within the digital

processor program counter CCAs.

PRESET (S5)

A high PRES and low PRES input from the PRESET

(pressed)

switch sets the preset latch within the unit under-test

processor timing CCA. This set latch overrides HALT,

permitting the digital processor to execute one

instruction cycle.

During this cycle, a low PCWS (program counter write

strobe) enables the ASW0 thru ASW15 address input.

PCCLK (program counter clock) loads this address onto

the RAD0 thru RAD15 lines in positive true format.

RAD0 thru RAD15 address the ROM CCAs. At the

conclusion of the cycle, the preset latch on the

processor timing CCA is reset, restoring the HALT

condition with the digital processor address matching

the settings of the digital processor test set ADDRESS

switches.

NORM ROM/DPTS ROM (S1)

In the DPTS ROM position, S1 sends a low (ground) DF

(set to DPTS ROM)

ENABLE signal to the unit-undertest ROM extender

CCA. The CCA responds to this input by generating a

high RS15 signal, which disables the internal ROM

buffer, and a low enabling signal, which allows the

digital processor test set diagnostic ROM output to feed

the digital processor instruction bus. In effect, the digital

processor ROMs are bypassed.

The RAD0 thru RAD15 address from the program

counters CCAs is transferred to the digital processor test

set diagnostic ROMs via the digital processor ROM

extender CCA, the cabling XAD0 thru XAD15 lines, and

diagnostic buffer CCA A4. The diagnostic buffer inverts

the XAD0 thru XAD15 input to provide a positive true

duplicated RAD0 thru RAD15 word, which addresses the

digital processor test set ROMs and drives the

PROGRAM ADDRESS octal display on CCA A2.

5-9