Frequency Counter-Display

TM 11-6625-922-15

SYNC pushbutton to enable a synchronous start of the

Transistor Q14 is a voltage source, the emitter of which

various counter circuits.

is set at approximately +3 volts. Pin H is connected to

either pin Z or Y, as selected by the DELAY METER

l. Time-Delay Logic A9 (fig. 9-26). This module

RANGE MS switch. The input rectangular wave is

contains divider circuits plus diode AND gates for the

filtered by series resistors R51 and R52, or R54 and

eventual generation of the reference timing signal. A

R55, and capacitor C16 so that a constant proportion of

square-wave input at pin F is divided by 2 in M1,

the dc component can be read by the DELAY meter,

producing a strobe signal. Circuits M2, M3, and M4 are

thus converting duty cycle to a time reading. One end

used together for a divide-by-5, M5 and M6 are used for

of the meter is referenced to +3 volts, so that a 25-

a divide-by-4, and M7 and M8 are used for a divide-by-

percent duty cycle would be interpreted as zero delay.

4. The outputs of the first counter diode-decoded to

The sine-wave input modulating signal is applied at pin

generate 1 out of 5 (time 1 through time 5); the outputs

A. Transistors Q1, Q2, and Q3 make up a feedback

of the second and third counter are diode-decoded to

amplifier with a gain of approximately 5. The sine wave

generate 1 out of 4. Three outputs, one associated with

is then fed to diode bridge CR11 through CR14, which

each counter, are therefore selected at any time. The

acts as a zero-crossing detector. The square waves at

output at pin R is a square wave of the proper

C8 are sent to integrated circuit amplifier A1 which with

modulating frequency, 250, 83-1/3, or 25 Hz.

feedback provides a gain of about 47. Transistor Q10 is

m. Frequency Counter-Display A1(fig. 9-28). This

a current source for Schmitt trigger Q9, Q11 which

module contains five numerical indicator tubes plus the

receives the signal from emitter-follower Q6. The

driving, counting, and decoding circuitry needed for the

threshold of the Schmitt trigger is set by voltage source

digital frequency counting. A sine-wave input is fed to

Q12, the base voltage of which is set by the tap position

Schmitt trigger Q3, Q4, and then to common-emitter

of resistor R58, R59 or R68. The three thresholds are

switch Q5, which generates a square wave between

used for the three modulating frequencies, and are

ground and +5 volts. This square wave is then enabled

automatically switched in by the MODULATION

during a time determined by the display gate signal to

FREQUENCY HZ switch. The output of the Schmitt

drive five series decade counters M2 through M6. The

trigger is sent to switch Q13, then to switch-inverter Q16

outputs of these counters are decoded by decoder-

to obtain the proper polarity for activating flip-flop M1.

drivers M7 through M11 and drive indicator tubes.

k. Countdown Logic A10 (fig. 9-24). The main

Diodes CR1 through CR10 are used as clamps so that

input to this assembly is a 2-MHz square wave at pin B.

the integrated circuit outputs cannot get much more

By counting down this frequency, most of the timing

positive than + 55 volts. Transistors Q1 and Q2 are

signals required in the TS-2669/GCM are derived. The

used as a voltage source to derive the + 55 volts from

2-MHz input is gated with a synchronization signal from

the high voltage used by the indicator tubes. Circuit M1

flip-flop M20 in gate M1. Circuit M2 is a divide-by-10,

also contains a gate used as a driver for resetting the

and M3 is a divide-by-5. This 40-kHz signal is used

counter.

directly, or is further divided by 3 in M4, M5, or is

n. +12 and -12 Volt Regulators A11 (fig. 9-30).

divided by 10 in M6, to generate the proper ratio of

The +12 volt circuit provides an adjustable, regulated

frequencies for the modulation signal, as selected by the

voltage that is also protected against excess output

MODULATION FREQUENCY HZ switch. The 4-kHz

current. If the circuit tries to deliver an excess current,

signal is applied to M8 (divide-by-2), to M9 (divide-by-2),

the output voltage will drop near ground. Differential

and then to M10 (divide-by-10) to produce a 100-Hz

amplifier Q16 and Q18 has one input referenced to

square wave. Circuit M11, M12, and M13 are each

Zener diode CR4 and the other input samples the dc

divide-by-10 circuits to produce the timing signal of 10

output voltage through the tap on resistor R37. The

Hz, 1 Hz, and 0.1 Hz, for selection at the three other

amplifier error voltage at the collector of Q16 is

gates in M1. One of these three timing signals is

amplified by Q14, then fed to pass transistors Q12 and

selected by the COUNTING TIME switch. Three pairs

Q13, which operate as a compound emitter follower.

of flip-flops perform the single ac set-ac reset function.

The unregulated voltage is applied to pin T and a higher

These flip-flops, (M14, M15; M16, M17; and M18, M19)

voltage (approximately +40 volts) is applied to pin S.

are used in a loop to control the timing of the digital

Transistors Q2 and Q4 compose a differential amplifier

counter. Flip-flops M20 and M21 are also used as a

for current overload protection. Resistor R6 is the

single ac set-ac reset flip-flop in conjunction with the

5-14