 |
|||
|
|
|||
|
Page Title:
Mag TAPE CONTROLLER A1A3A14 INFIBUS ACCESS CIRCUIT |
|
||
| ||||||||||
|
|
 T.O. 31S5-4-308-1
TM 11-5805-663-14-13
NAVELEX 0967-464-0010
5 - 5 5 0 . The control register write operation
is similar to the data register write opera-
tion except, G4 is enabled as explained
previously and then activated by AMAS-P
which generates ACNT-N. ACMT-N acti-
vates gate G13 which generates MPXB-P.
The control register read operation is simi-
Par to the data register read operation, ex-
T-N is generated, G13 is activated,
generating MPXB-P which is used by the
Mag Tape Controller data input and selector
circuit during the read operation to select
the control register data to be placed on the
INFIBUS data lines.
The status register write operation;
5-561.
is similar to the other write operations ex-
cept, G5 is activated. G5 generates
AWST-N to the Mag Tape Controller data
output and control register circuit which
generates a general reset for the Mag Tape
layed 50 nsec by delay DL2. After the
Controller function. AWST-N activates
is disabled a
the output of
gate G12 which generates MPXA-P. The
which activates
ed by inserter
status register read operation is similar to
G 9 generates ADUN-N (waveform
the other read operations except, when
H, figure 42) which causes the May Tape
AWST-N is generated by G5, G12 is acti-
S access circuit to gener-
Controller INFI
vated. The output of G12, MPXA-P, is
ate ONE-N which indicates a completed
routed to the Mag Tape Controller data out-
d a t a t r a n s f e r . Inverter I10 then inverts
put and selector circuit to select the status
the output of I10 and after the 50 nsec de-
data that is to be placed on the INFIBUS
lay of delay DL3, G4 is disabled which re-
data lines.
moves ADUN-N (high).
When the Mag Tape Controller
5-562,
5-558. To read the Mag Tape Controller
INFIBUS access circuit is requesting
data register, t h e m a s t e r f u n c t i o n p l a c e s
I N F I B U S access, BONE-K is low. BONE-N
the Mag Tape Controller address on the
activates G12 and G13 which generate
address lines and RITE-N will be high. The
MPXA-P and MPXB-P, respectively. With
address IS recognized and G6 is enabled
and G3 generates AABL-P as explained pre-
MPXA-P and MPXB-P both high the Mag Tape
Controller data output and control register
viously. I11 inverts the high RITE-N input
and disables G7 and G10 Inverter I12 in-
circuit generates the Mag Tape Controller
device number which is strobed to the
verts the output of I11 and generates
INF1BUS data lines.
ARED-P (waveform A, figure 43) which
enables gate G11.
Mag TAPE CONTROLLER A1A3A14
INFIBUS ACCESS CIRCUIT.
|
|
Privacy Statement - Press Release - Copyright Information. - Contact Us |
Click
here for thousands of PDF manuals