Mag TAPE CONTROLLER A1A3A14 INFIBUS ACCESS CIRCUIT

T.O. 31S5-4-308-l

TM 11-5805-663-14-13

NAVELEX 0967-464-0010

generated on the INFIBUS or when the Mag

G2 which disables G3. PCDA-P activates

Tape Controller is slaved to write into its

G8 and the output of G8 disables G10 and

status register, the Mag Tape Controller

sets FF3. The 0 output of FF3 disables

data output and control register circuit

gates G7 and G4. Disabling G4 causes

generates GRSA-N. GRSA-N clears flip-

SRL3-N to be removed. The 0 output of

flops FF2 through FF5, and activates gate

FF3 is also coupled through driver DR2

G13 which resets flip-flop FFl.

which generates SACK-N (waveform H,

figure 45). The Bus Controller senses

5-566. When a control word that enables

SACK-N and removes SEL3-N which disables

interrupts is stored in the Mag Tape Con-

G7. Also, when PCDA-P returns to low,

troller data output and control register cir-

G8 is disabled. This activates G10 and

cuit, CR2S-P (waveform A, figure 45) is

the output of G10 clears FF2. The 1 output

generated which enables the set input of

(low) of FF2 disables G2, G4 and G8, and

FFl.

the output of G2 enables G3 to couple

PCDA-P through to the INFIBUS as PCDB-P.

5-567. When the Mag Tape Controller

The 1 output of FF3 enables G10, and acti-

notifies the Block Transfer Adapter to per-

vates gate G9 which sets FF4 and activates

form a transfer, the Mag Tape Controller

gate G14.

read/write control status circuit generates

PDSA-N (waveform C, figure 45) which

5-570. The 0 output of FF4 disables G7,

enables gate G5. At the same time, if the

and the 1 output of FF4 enables gates G11

Formatter function generates STS2-N,

and G15, and activates G16. G16 gener-

STS2-N activates G5. The output of G5

ates BONE-N (waveform I, figure 45) which

activates gate G6 and the output of G6 ac-

also activates G14. G14 generates BOLA-P

tivates gate Gl. Or, if the Formatter

(waveform J, figure 45) and BOLA-P and

function generates SC low, inverter I2

BONE-N cause the Mag Tape Controller de-

inverts the low SC and the output of I2 ac-

vice number to be placed on the INFIBUS

tivates G6 which activates G1. If an error

d a t a lines. Also, BOLA-P enables gates

is detected when transferring data to or

G17 and G18, and is inverted by inverter

from the Formatter function, the Mag Tape

I8. The output of I8 is delayed 50 nsec

Controller read/write control status circuit

by delay DLl which then activates G18.

generates EROR-N (waveform D, figure 45)

G18 generates STRB-N which is routed to

which activates Gl. When the Block

the INFIBUS and also Inverted by inverter

Transfer Adapter completes all required

I9 which generates STRA-P (waveform K,

transfers, the Mag Tape Controller data out-

figure 45). STRA-P activates G11 which

put and control register circuit generates

clears FF3. The 0 output (high) of FF3

CATS-P (waveform B, figure 45) which acti-

enables G4 and G7 and causes SACK-N

v a t e s Gl.

to be removed. The 1 output of FF3 disables

G9 and G10. STRA-P is also inverted by

5-568. When any of the cases discussed

inverter I7 which disables G9.

which activates G1 occurs, the output of

Gl is inverted by inverter I1 which triggers

5-571. After the data is transferred,

and sets FFl. The 1 output of FFl activates

DONE-N (waveform M, figure 45) is re-

gate G7 which sets FF2 and disables gates

ceived. DONE-N is inverted by inverter

G2 and G8. The 1 output of FF2 enables

I4 which generates BDNA-P (waveform N,

figure 45). BDNA-P activates G15 and G16,

G2 and G8, and activates G4. The output

and is also inverted by inverter I3. The

of G4 is coupled through driver DRl which

output of G15 sets FF5 and activates G13

generates SRL3-N (waveform E, figure 45).

which resets FF1. The output of I3 dis-

ables G9 and G12. With FF5 set, Gl2 is

5 - 5 6 9 . The Bus Controller senses SRL3-N

enabled and when DONE-N returns to high,

and returns SEL3-N (waveform F, figure 45)

BDNA-P goes low which disables G15 and

and the precedance pulse PCDA-P (wave-

form G, figure 45). SEL3-N disables G7.

G16 removing BONE-N. The output of I3

The output of G7 enables G8 and activates

now activates G12 which clears FF4. The

5-82