PARALLEL I/O AlA3A10 ADDRESS RECEIVERS AND RECOGNITION CIRCUIT

T . O . 31S5-4-308-1

TM 11-5805-663-14-13

NAVELEX 0967-464-0010

is generated as explained previously.

and G3 (high) cause the outputs of

However, STA3-P now enables G13 which

ROM 4 to assume a fourth pre-

is activated by STAB-P. The output of

programmed value (nibble 4). SSRM-P

G13 activates G14 which clocks nibble 2

(waveform G, figure 40) activates G15

into ROM nibbles data register U48. No

which activates gate G14. The output of

data is clocked into ROM nibbles data

G14 clocks the outputs of ROM 4 into the

registers U48 and U68 during STA4-P

ROM nibbles data register U48. The

and STA5-P because G2, G4, G6, G11,

N400-N through N404-N outputs of ROM

G12, G15 and G17 are disabled. When

nibbles data register U48 are coupled

SRDS-P goes high N300-N through N303-N

through data multiplexer U39 to data bus

and N400-N through N403-N are strobed

drivers U40.

through data bus drivers U50 and U40 to

the INFIBUS data lines DB07-N through

5 - 3 8 0 . When SSRM-P returns to low,

DBOO-N, as explained previously.

SRDS-P (waveform N, figure 40) goes

high. SRDS-P activates G17 and G22.

5 - 3 8 3 . If ABOO-N is low, the output of

The output of G17 activates G18 which

I10 enables G6 and G12 and the output of

strobes the outputs of the data multi-

Ill disables G7 and G13. No data is

plexers U59 and U69 through the data

clocked into the ROM nibbles data reg-

bus drivers U60 and U70 and onto the

isters U48 and U68 during STA2-P and

INFIBUS data lines DB08-N through

STA3-P because G2, G4, G7, G11, G13,

DBl5-N. At the same time the output of

G15 and G17 are disabled. When STA4-P

G22 activates G21 and is inverted by

goes high, nibble 3 (third pre-program-

inverter I14. The output of I14 strobes

med value of the outputs of ROM 4) is

N300-N through N303-N through the data

generated, as explained previously.

bus driver U50 and onto the INFIBUS

STA4-P enables G10 which is activated

data lines DB04-N through DB07-N. The

by STAB-P. The output of G10 now acti-

output of G21 strobes the outputs of data

vates G6 which activates G8. The out-

multiplexer U39 through the data bus

put of G8 now clocks nibble 3 into the

driver U40 and onto the INFIBUS data

lines DBOO-N through DB03-N.

ROM nibbles data register U48. When

STA5-P is generated, nibble 4 (fourth

5 - 3 8 1 . If the Autoload recognizes its

pre-programmed value of the outputs of

address and a byte (8-bits or two 4-bit

ROM 4) is generated as explained pre-

viously. When SSRM-P goes high, G12

nibbles) is to be strobed to the INFIBUS

data lines, BYTE-N is low and is in-

is activated which activates G14. The

verted by I12. This high output of I12

output of G14 now clocks nibble 4 into

enables G6, G7, G12, and G13 and is

ROM nibbles data register U68. When

inverted by I13. This high output of I13

SRDS-P goes high N300-N through N303-N

disables gates G2, G4, G11, G15 and

and N400-N through N403-N are strobed

G17. Also AMAS-P is high enabling G22,

through data bus drivers U50 and U40

onto the INFIBUS data lines DB07-N

5 - 3 8 2 . If ABOO-N, is high the output of

through DBOO-N, as explained previously.

inverter I10 disables G6 and G12. The

5-384.

PARALLEL I/O AlA3A10 ADDRESS

output of I10 is also Inverted by inverter

RECEIVERS AND RECOGNITION

Ill which enables G7 and G13. When

CIRCUIT.

STA2-P goes high nibble 1 (first pre-

programmed value of the out put of ROM 4)

5 - 3 8 5 . General. The Parallel I/O address

is generated as explained previously.

receivers and recognition circuit recog-

However, STA2-P now enables G7 which

nizes the Parallel I/O address when being

is activated by STAB-P. The output of G7

slaved by a master function. It selects the

activates G8 which clocks nibble 1 into

internal registers of the Parallel I/O and

ROM nibbles data register U48. When

performs a read or write operation as

STA3-P goes high nibble 2 (second pre-

determined by the master function slaving

programmed value of the outputs of ROM 4)

the Parallel I/O.

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