Table 3-1. Digital Processor Test Set Controls, Indicators, and Connectors - Continued

TM 32-5811-024-14&P

Table 3-1. Digital Processor Test Set Controls, Indicators, and Connectors - Continued

Control, indicator, or

connector

Function

XMT

Modifies 32-bit communication processor control-

(S16)

indicator CMD 1 or CMD 2 word with an active (high)

XMT2T (transmit response twice) bit.

TEST

Modifies 32-bit communication processor control-

(S17)

indicator CMD 1 or CMD 2 word with an active (high)

self-test bit.

D.F. CONTROL TEST

SELF TEST/SEND

SEND - Used with the shorting plug on the digital

(S18)

processor test set J13 connector to check the per-

formance of digital processor test set RF processor

simulator CCA AS. Successful completion of this test

results in the correct RESULTING DELAY LINE CMD

and ANTENNA SWITCH CMD code presentation on the

COMMAND DISPLAY.

FULL SCALE/HALF SCALE

FULL SCALE - Simulates a df servo audio signal.

(S19)

HALF SCALE - Simulates a df servo audio signal.

BLANKING

Tests the ability of the df control digital

(S20)

processor to be interrupted.

Analog 0 output that simulates df receiver audio

output for df servo loop tests.

Analog 1 output that simulates df receiver audio

output for df servo loop tests.

Digital processor test set output for blanking of

df control.

CPU DISPLAY:

SOURCE BUSS

LED indicators that display unit-under-test digital

(A1CR3 thru AlCR18)

processor source bus data in binary form:

LED on = 1, LED off = 0.

DESTINATION BUSS

LED indicators that display unit-under-test digital

(A1CR21 thru A1CR36)

processor destination bus data in binary form:

LED on = 1, LED off = 0.

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