ERROR RATE DETECTOR AND REMOTE ALARM (ERD) CARD

T.O. 31W2-2GSC24-2

TM 11-5805-688-14-1

NAVELEX 0967-LP-545-3011

In a no-error condition, signals PSE and NSE applied to

applications, it is possible that, over a given period of

AND gate U28-3 are never present (high) at the same

time, a given number of data bits in the incoming

time. In turn, the signals applied to the other AND gates

message may be erroneous as a result of environmental

are con- figured so that any one of the AND gates should

and electrical transient interferences.

Distorted or

never be enabled in a no-error condition. For example,

missing data bits could result in erroneous minor frame

any two of the ENA3, EPS3, and ENS3 signals should

counts and could cause errors in the demultiplexer timing

never be low at the same time.

function. The minor frame numbers in the overhead

messages are always applied in a predetermined order.

5-534. Loss of frame sync diagnostic signal LBS- is

Therefore, it is practical to identify a minor frame count

generated when demultiplexer frame sync signal

in one overhead message and then synthetically

DSYNC- is generated out of sequence. In a no-error

generate error-free minor frame counts in the

condition, AND gate U12-10 is not enabled when signal

demultiplexer that are identical to the subsequent minor

DSYNC- is generated. When AND gate U12-10 is

frame counts which should exist in the subsequent

enabled, loss of frame sync signal LBS- is generated

incoming messages.

The minor frame generation

from flip-flop Ull when the next RIO-signal is generated.

circuits perform this function. The circuits scan the

incoming message and establish synchronization to a 5-

bit minor frame count during word 28.

Once

5-535. ERROR RATE DETECTOR AND REMOTE

synchronization is established, the minor frame count

ALARM (ERD) CARD.

generated on the ERD card is used in the demultiplexer

circuits. A comparator circuit continually compares the

5-536. GENERAL. The ERD card is one of the common

minor frame count generated in the ERD card with the

card types in the demultiplexer. Two functions are

minor frame count in the overhead message. Through

performed in the ERD card: a timing function that

application of a confidence counter-comparator circuit,

generates the minor frame count signals used in the

the circuits are programmed to detect a nominal amount

demultiplexer timing functions,

and an error rate

of differences (no compares) without trying to

detection function that lights the LINK ERROR RATE

resynchronize the minor frame count generated in the

indicator when the occurrence rate of errors detected in

ERD card. It is probable that a nominal amount of no

the incoming serial data stream exceeds a

compares may be caused by transient problems rather

predetermined threshold. The functional circuits on the

than by a true loss of synchronization. When the number

ERD card are divided into the minor frame generation

of no compares exceeds a predetermined figure, a

circuits shown in figure 5-40, the error rate detection

resynchronization function is performed to synchronize

circuits shown in figure FO-10, and the error reset and

the demultiplexer frame count to the frame count in the

self-test circuits shown in figure 5-41. The logic diagram

incoming message.

for the ERD card associated with the detailed circuit

discussion is contained in the circuit diagrams manual.

5-539. Minor Frame Generation Circuits (Figure 5-

40). The incoming demultiplexer overhead data bits

5-537. BLOCK DIAGRAM DISCUSSION.

(DOD-) are continually applied to the overhead shift

5-538. Minor Frame Generation Concept. The 5-bit

control circuit.

minor frame count is in bit 0 of words 24 through 28 in

the overhead message format.

In some system

5-142