|
|
T.O. 31W2-2GSC24-2
TM 11-5805-688-14-1
NAVELEX 0967-LP-545-3011
Figure 5-39. FS Card, Diagnostic Circuits - Block Diagram
When the next TC time occurs, the B10 set of SD2 and
SD3 bits in the two latch circuits. In a no-error condition,
SD3 bits is applied back to the data compare circuits,
a compare condition is obtained.
where the two bits are compared with the two SD2 an
5-135
|
Privacy Statement - Press Release - Copyright Information. - Contact Us |