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T.O. 31W2-2GSC24-2
TM 11-5805-688-14-1
NAVELEX 0967-LP-545-3011
5-78.  The timing recovery (TR) circuits generate the
pulse transition is a positive-going or a negative-going
timing signals that are synchronized with the incoming
transition. The timing signals from the timing generator
asynchronous digital data. As described in the RCB card
to the RCB circuits are developed from the T4800 or the
discussion, the timing signals are necessary to clock the
T3600 (Hz) timing signals from the RT card.  The
incoming data pulses into the RCB circuits. The data
selected timing rate is either 225, 300, 450, 600, 900, or
receiver in the timing recovery circuits conditions the
1200 Hz, corresponding to the input rate ranges of 75,
applied digital data (DIXX) into TTL levels that are
100, 150, 200, 300 or 400 bps, respectively. The timing
compatible with the logic circuits on the card. The data
signals also synchronize the 3bit code output from the
pulses are applied to a transition detector circuit and to
encoder so that the 3-bit data codes and the TE timing
the RCB circuits. The transition detector circuit applies a
signals applied to the RCB circuits are synchronous
reset signal to the timing generator circuit each time a
pulse transition occurs. The timing generator circuit, in
5-80.  The TE/TR switches on the card are set to apply
turn, receives a continuous timing output from the timing
the data and associated timing signals from the TE or TR
oscillator.  The timing signals are divided down to
circuits to the RCB circuits. The RCB circuits process
produce the selected timing output rate that is the same
the incoming data to be synchronous with the multiplexer
as the incoming data bit rate. By resetting the timing
timing functions as described for the RCB card.  The
generator circuits each time a positive-going or negative-
RCB circuits on the TE/ TR card do not have the coarse
going pulse transition occurs, the continuous TR timing
rate conversion circuits associated with the RCB card.
signals to the RCB circuits are effectively held in
The data output (MDT002) is clocked to the GC/DM card
synchronization with the conditioned data pulses applied
by system clock signal MRI02-.  The positive and
to the RCB circuits.
negative stuff request signals (MPST02 and MNST02)
are applied to the OEG card.
5-79.  The transition encoder circuits generate the
timing signals that are synchronized with the incoming
5-81.
VOICE ENCODER (VE) CARD.
asynchronous digital data.  The data receiver in the
transition encoder circuits conditions the applied digital
5-82.  The VE card receives one voice channel and
data and applies the conditioned pulses to the 3-bit
converts the incoming analog signals into synchronous
transition encoder circuits. Each time a positive-going or
digital data that can be combined with other data
negative-going transition of a data pulse occurs, the 3-bit
channels in the GC/DM card. The VE card processes
transition encoder circuits generate a 3-bit digital code
signals in the range of 150 to 3500 Hz.  The voice
that is synchronous with the TE timing pulses being
signals are applied to a voltage comparator circuit that
applied to the RCB circuits. The 3-bit code identifies the
compares  the  incoming  analog  signals  with  a
following: that a transition has occurred; the position of
reconstructed analog signal voltage from the D/A
the transition as related to the first half or the second half
conversion circuits.  In real time, the reconstructed
of the timing signal at the time of transition; and that the
analog signals should be almost identical to the incoming
analog signals to the card.  The difference voltage
developed in the voltage comparator circuit is applied as
an error voltage to the digital sample and control circuits.
5-22

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