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Page Title: INTEGRATED CIRCUIT DESCRIPTIONS-CONT.
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T.O. 31s5-4-308-l
TM 11-5805-663-14-13
NAVELEX 0967-464-0010
(wired-OR). Typical applications include
data inputs when the count/load is
high-speed logic buffers, power drivers,
ill remain unchanged when the
is high. When used as 4-bit
relay drivers, lamp drivers,  OS drivers
and memory drivers.
e clock 1 and clock 2 input must
5-806. U7B961455X, DUAL DIFFERE
LINE DRIVER (see figure 168). The
5-804.
U7B961459X is a TTL compatible dual
differential line driver. It is designed to
drive transmission lines either differen-
tially or single-ended, back
terminated. The output are s
TTL, with active pull-up and
split and brought out to  adjac
This allows multiplex operation (wired-OR)
at the driving site in either the single-
l and 23), high (see associated truth table).
ended mode via the uncommitted collectors
data is loaded into the associated
or in the differential mode by use of the
-flop and appears at the associated
output (pins 4, 6, 8, 10, 14, 16, 18
active pull-ups on one side and the un-
committed collectors on the other. The
10) after the low-to-high-
of the clock input (pin 11). During loading
two pairs of outputs are complementary,
providing "NAND" and "AND" outputs when
serial data flow is inhibited. Shift right
all three inputs are high.
is accomplished synchronously with the
low-to-high transitions of the clock when
5-807. U7B961559X DUAL DIFFEREN
is high and Sl is low. Serial data for
this mode is entered at the shift-right
LINE RECEIVER (see figure 169),
data input (pin 2). When S0 is low and
U7B961559X is a dual differential line re-
1 is high data shift
ceiver designed to receive differential
and new data is ente
digital data from transmission lines. A
up available on an adjacent
positive input (pin 5 or 11) is
more positive than the voltag
negative input (pin 7 or 9),
(pin 1 or 15) goes low while the active
pull-up (pin 2 or 14) goes
versely, when the positive
millivolts more negative th
applied to the negative inpu
(pin 1 or 15) goes high while the active
pull-up (pin 2 or 14) goes low. Therefore,
for a differential input, TTL logic is seen
at the output.
SECTION
III
FUNCTIONAL OPERATION OF
MECHANICAL ASSEMBLIES
MOT APPLICABLE

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