MAG TAPE CONTROLLER DATA OUTPUT AND CONTROL REGISTER CIRCUIT-CONT.

T.O. 31S5-4-308-l

TM 11-5805-663-14-13

NAVELEX 0967-464-0010

DOOA-N through DO5A-N, D08A-N, and

vated

which presents a high to the control

DO9A-P to the INFIBUS data lines.

loaded with the control word, CR1S-P is

5-588. To load data into the Mag Tape

generated which enables G10. Also,

Controller data register, the Mag Tape

CR1S-P is routed to the Mag Tape Control-

Controller must first be reset and then the

ler read/write control status circuit. If a

Mag Tape Controller control register must

read control word is presented on the INFI-

be loaded with a write control word. This

BUS data lines, DBOO-N is low and DBOl-N

causes WBAS-P and CR1S-P to be generated,

is high which causes G7 to be disabled and

as discussed previously, which enables

G4 to be activated. G4 generates CROA-P

G10. When the Mag Tape Controller is

for the duration of the loading of the control

slaved to write data into its data register,

DBOO-N through DBO7-N, representing the

is loaded with the control word, CROS-P

data word, are present on the INFIBUS.

is generated which enables G13, G14 and

DBOO-N through DB07-N are inverted and

G16. Also, CROS-P is routed to the Mag

routed to the output data register U57

Tape Controller read/write control status

by the data bus driver/receivers U69,

circuit. In both cases, CR2S-P is gener-

U70 and U80. The Mag Tape Control' address

ated by control register U66 which is routed

receiver and recognition circuit then

to the Mag Tape Controller INFIBUS access

generates ADAT-P and AWRT-P. ADAT-P

circuit to enable interrupts. Gates G2 and

enables G10 and AWRT-P activates G10

inverters I3 through I6, and I8 invert the

which generates WDRB-N. WDRB-N trig-

outputs of the control register and generate

gers and loads the output data register U57

CROO-N through CR05-N which are routed

w i t h t h e d a t a w o r d . A l s o , WDRB-N

to the Mag Tape Controller data input and

is routed to the Mag Tape Controller read/

selector circuit. For a read or a write

write control status circuit and this causes

control word, gates G5 and G8, drivers

WBAS-P to be removed which disables G10.

DR2 and DR3, and inverters I9 and I10 de-

G10 removes WDRB-N and the outputs of

code the outputs of control register U66

the output data register U57 is

which generates, CMDl-N, CMD2-N and

coupled through data drivers U62, U63 and

LDlA-N and LD2A-N to the Formatter func-

U72 (DRl shown) which generates ODOO-P

tion.

t h r o u g h O D 0 7 - P . ODOO-P through OD07-P

represents the data word which is routed

5-587. Which the Mag Tape Controller is

to the Formatter Function.

slaved to read its control register, the

Mag Tape Controller address receiver and

recognition circuit generates AABL-P (wave-

5-589. When the Mag Tape Controller is

form A, figure 87) and ARED-P (waveform

slaved to read data out of its data register,

B, figure 87) which enables G15. The Mag

the Mag Tape Controller address receiver

Tape Controller INFIBUS access circuit

and recognition circuit generates AABL-P

then generates STRA-P (waveform C, figure

and ARED-P. AABL-P and ARED-P enables

87) which activates G15 and the output of

G15 and then the Mag Tape Controller

G15 enables G13, G14 and G16. The Mag

INFIBUS access circuit generates STRA-P

Tape Controller address receiver and recog-

which activates G15. The output of G15

nition circuit then generates AMAS-P (wave-

enables G13, G14 and G16 and then the

form D, figure 87) which activates G13 and

Mag Tape Controller address receiver and

G13 generates DBRA-P (waveform E, figure

recognition circuit generate AMAS-P and

87). At the same time, the Mag Tape Con-

ADAT-P. AMAS-P activates. G13 which

troller data input and selector circuit

generates DBRA-P. ADAT-P activates G14

generates DOOA-N through D15A-N, repre-

and G16 which generates DBRB-P and

senting the control word, which is routed

DBRC-P, respectively. At the same time,

to the data bus driver/receivers U69, U70,

the Mag Tape Controller data input and

U79 and U80. DBRA-P strobes data bus

selector circuit generates DOOA-N through

driver/receivers U70 and U80 which couple

D15A-N which are routed to the data bus

5-85