|
|
TM 11-6625-667-45
be gated by counter reset gate A2M15A. This
performs an isolating function in the collector
action also gates a counter reset signal through
circuit. The emitter output is fed into a filter
gates A2M18A and A2Q5/A2Q6 to the coun-
consisting of inductor A3L1 and capacitors
ter. Both counter reset gates are inhibited
A3C2 and A3C6. Diode VR1 provides regula-
when readout control A2FF7 is set by an ac-
tion at the output of the filter if the voltage
ceptable count. A constant readout (ACCEPT
increases above 6.3 volts. At this point, the
or REJECT) is maintained by the reply rate
voltage is normally 5.6 volts (approximately).
evaluator until the PUSH ON TEST switch is
Additional filtering is performed by the action
released.
of capacitors C7, C8, and C9.
b. Square Wave Oscillator A8Q10/A3Q11
c. Prf Counting. The prf counter controls
the operation of time-decoded video enable
trols the operation of series power regulator
A2SS2. It enables this one-shot for the initial
A3Q1. Its operating frequency is dependent
64 prf periods. After this time, it disables
on the load, and is controlled by the action of
A2SS2 until the counter is reset by the release
constant current amplifier A3Q7/A3Q8. The
o f the PUSH TO TEST switch. When the
square wave output, applied through amplifier
PUSH ON TEST switch is activated, each prf
A3Q9 to emitter follower A3Q3, is held off
pulse is gated by prf count gate 1 (A2M16A)
one-fifth more than on; therefore, this action
and coupled by inverter A2M16C to trigger
maintains approximately 5.6 volts at the emit-
flip-flop A2FF8. On the count of 64, flip-flop
ter of series power regulator A3Q1 by effec-
A2FF14 goes high and gates on prf count gate
tively dividing the 28-volt dc input.
2. This action disables prf count gate 1 and
one-shot A2SS2 until the prf counter is reset
c. Constant Current Circuit. The constant
by the release and activation of PUSH TO
current circuit consists of constant current am-
TEST switch; therefore, additional time-de-
plifier A3Q7/A3Q8, limiting amplifier A3Q2
coded video counts are inhibited.
/ A 3 Q 4 , and differential amplifier A3Q12/
A3Q13. This circuit provides a constant cur-
rent source for the square wave oscillator. The
5.1-4. 5-Volt Regulator Module A3
constant current amplifier operation is con-
trolled by the limiting and differential ampli-
T h i s voltage regulator provides the power
fiers. Output current limiting is adjusted with,
source to the micrologic circuits in mode 4
control A3R3 (fig. 8-42). The setting of this
modules Al and A2. Regulation is performed
control establishes the base bias of stage A3Q2
by series power regulator A3Q1, and its con-
and, in turn, its conduction. The collector out-
ducting is controlled by the operation of square
put of stage A3Q4 is coupled by diode A3CR3
wave oscillator A3Q10A/A3Qll through am-
to the common emitter circuit of constant cur-
plifiers A3Q3 and A3Q9. The operation of
rent amplifier A3Q7/A3Q8. Adjusting con-
the oscillator is controlled by a constant cur-
trol A3R3 will establish a regulated emitter
rent circuit. Transistors A3Q5 and A3Q6 form
b i a s at A3Q7/A3Q8. Differential amplifier
a + 12-volt bias protection circuit. If the +12-
A2Q12/A3Q13 establishes the base bias at
volt bias is not present, this circuit stops the
stages A3Q7/A3Q8. Control A3R24 is used
conduction of A3Q1, thus preventing regula-
to adjust the differential amplifier (A3Q7/
tor circuit damage because of loss of bias volt-
A43Q8) operation and, in turn, the regulator
age.
output voltage. If a short circuit occurs at the
regulator output, the current limiting stages
a. Series Power Regulator A8Q1. This stage
serve as a load, thereby preventing power sup-
operates in series with the 28-volt source and
ply damage. If the regulator input voltage
mode 4 modules (Al and A2). Its conduction
changes, it is sensed by the differential ampli-
determines the source output voltage and is
fier. This amplifier causes the square wave os-
controlled by square wave oscillator A3Q10/
cillator to change frequency through the con-
A3Q11 (fig. 8-39). Diode A3CR1 (fig. 8-42)
Change 1
5.1-4
|
Privacy Statement - Press Release - Copyright Information. - Contact Us |