Transmitter Modulator and RF Circuits

TM 11-6625-667-45/NAVAIR 16-30APM123-2/TO 33A1-3-367-22

output of this modulator driver is a positive pulse,

mon to the decoder section. Six delay line taps are

and is applied to the transmitter low P2 pulse

used for encoding. Five taps are used for the select-

modulator (para 2-3). In this case, the P2 pulse ap-

able P1 pulse, and a common tap is used for the P3

pears in the rf output at a minimum level of 10 deci-

pulse. The P3 pulse tap is the last tap and is located

bels (dB) below the P1-P3 rf level. When switch

25 microseconds down the delay line.. The pulse-pair

A15S7 is at the ON position, it is routed the same

spacing is determined between the leading edges of

way as the P1-P3 pulses to the main modulator in

P3 pulse and P1 pulse. The P1 pulse taps are located

the transmitter. In this case, the P2 pulse amplitude

3, 5, 6.5, 8, and 21 microseconds before the P3 tap.

at the rf output is the same as the other pulses. This

As the line-drive pulse flows down from the delay

line, it first appears at each of the P1 taps. The P1

pulse provides a transponder suppression circuit

test. In each case, the P2 pulse is spaced 2 microsec-

pulse are coupled by five respective emitter follow-

onds from the P1 pulse.

ers (EF) to P1-P3 pulse switching and gating cir-

d. Encoder Disabling- and Decodcr Enabling

cuits. The P1 delay line output, dependent on the

Pulse. The P3 pulse from the delay line is used to re-

mode, is selected at the delay line for the applicable

set encode enable IFF1 (b above), and as a decode

test. The selected P1 pulse is gated and triggers

enable (DE) pulse. After the P3 pulse is gated from

P1-P3 shaper ISS4. The pulse output of ISS4 has a

the delay line, it is inverted and amplified by the DE

0.8-microsecond duration and is negative. Then 3,

amplifier. The trailing edge of the resultant positive

5, 6.5, 8, or 21 microseconds later, the P3 pulse is

pulse resets IFF1. Thus, enabling voltage is re-

gated and also triggers ISS4. These delays represent

modes 1, 2, TEST, 3/A, and C, respectively, The re-

moved from the P1 and P3 gating circuits, The DE

sulting negative pulse-pair is inverted and gated by

pulse is also routed to the decoder section to preset

its various circuits for the transponder reply.

the main modulator driver. The main modulator

driver output is a positive pulse-pair applied to the

2-3. Transmitter Modulator and RF Cir-

transmitter main modulator circuit (para 2-3).

cuits

c. Interrogation Sidelobe-Suppression Pulse Gen-

(fig. 2-1)

eration. The ISLS pulse (P2) generation is initiated

by the P1 pulse. The leading edge of the gated nega-

The transmitter rf circuit is modulated by the en-

tive P1 pulse edge triggers delay generator ISS3. A

coder P1, P2, and P3 pulses and produces pulsed rf

2-microsecond positive pulse is produced, and its

signals at 1,030 megacycles (mc). The rf level can be

trailing edge triggers P2 pulse shaper ISS2. This

adjusted (internally) between 15 and + 4 dbm,

pulse shaper produces negative 0.8-microsecond

and normally is preadjusted to 9 dBm 1, as

measured at PROBE jack A15J24. The P2

pulses for all tests, except mode 4. During mode 4

tests, it is used to shape the external mode 4 interro-

pulse is transmitted at one of two levels. With

gation trigger input by generating a 0.5-microsec-

ISLS switch A15S7 at OFF, the rf level is at least 10

ond pulse for each trigger. Normally, the output of

dB below the preadjusted P1-P3 rf level. When this

ISS2 is applied through ISLS switch A15S7 (OFF

switch is on, its level is the same as the P1-P3

position) to the low P2 pulse modulator driver. The

pulses.

modulator

TwO

circuits

are

2-2

Change 4