LOGIC AND TIMING DIAGRAM ANALYSIS

T.O. 12P4-2APX-192

NAVAIR 16-35TS1843-1

TM 11-6625-1646-25

power level detector circuit is a simple Schmitt trigger (A4Q13,

The positive-going transition of the clock pulse pair from

A4Q14) which produces an output from 0 to +4 volt when the

A2A3B is also applied to A2A1OC. At this instant in time the

input reaches a pre-set level or above. The power level

output of A2A1OB is also high and is routed to A2A1OC.

threshold is set by the RF IN control (A1R2). The output of the

A2A1OC is enabled and the output is shaped by transistor

Schmitt trigger is routed to the bracket decoding network.

stages A2Q4 and A2Q5. The 0.83 usec shaped pulse pair is

5-13. Located at the input of the bracket decoding circuit is a

amplified and routed to the RF assembly (A1A1). When the

trigger gate (A4A1B, pin 5). The trigger gate receives and

last flip-flop is triggered, the high output is routed to A2A1OB.

inverts the power monitor pulse from the Schmitt trigger which

When the other inputs to A2A1OB are high, A2A1OB is

has been amplified and shaped by A4Q15 and A4Q16. The

enabled. The low output of A2A1OB disables A2A1OC, and

inverted pulse is then fed to a monostable multivibrator

clears the clock gate and ripple-thru counter.

(A4A2). The high output of A4A2, pin 6, is a positive 19 usec

5-11. In the RF assembly, an 85.8333 MHz signal is

pulse which is routed to A4A1C, pin 9 and 10, and inverted at

generated by a crystal controlled oscillator which is activated

pin 8. The inverted 19 usec pulse is fed to another inverter,

when the power supply is energized. The output of the crystal

(A4A1D, pin 12 and 13). The pulse is stretched at pin 13 input

controlled oscillator is fed to a step recovery diode A1AlA4CR1

of A4A1D by a pulse stretching, network to approximately 24

which multiplies the 85.8333 MHz signal by 12 with a resulting

usec. The positive 24 usec pulse is inverted once again at

frequency of 1030 MHz. The pin type diode A1AlA4CR2 is

pins 1 and 2 of A4A1A. The resulting 24 usec negative pulse

normally at a 0 volt potential thus preventing any RF

is applied to the trigger gate and prevents the trigger gate from

transmission. The output of A2Q6 is applied across the strip

operating for a 24 usec period. This same 24 usec negative

line type directional coupler (AlA1A4) to short AlAlA4CR2 thus

pulse is used to gate the ringing oscillator (A4Q5) which

allowing RF transmission. The 1030 MHz signal is then

oscillates at approximately 540 KHz. This frequency gives the

transmitted through the variable directional coupler to the

bracket decoding pulses a spacing greater than 1.45 usec.

primary transmission line (A1A1A1).

The transponder

The output of the ringing oscillator is amplified and shaped by

receives the pulse pair as a Mode 1 interrogation. If the

A4Q6 and A4Q18 and routed to a monostable multivibrator

transponder frequency, sensitivity, and Mode 1 decoder are

(A4Q7, A4Q8).

The multivibrator shapes the pulse to

within the prescribed tolerances, the transponder will reply with

approximately +5 volts amplitude and 0.35 usec width which

a Mode 1 reply. The frequency of this reply is sampled by the

serves as one of the three inputs to the decoding gate, A4A3A.

directional coupler AlAlA3 (strip line type) and coupled to a

The second input to the decoding gate is from the low output

three section bandpass filter. The received transponder reply

of A4A2 and the third input is the power monitor pulse from the

is then detected and routed to the comparator and power level

Schmitt trigger. The bracket spacing is decoded when the 19

detector circuits. The VSWR coupler is a directional air

usec pulse ends and a trigger pulse coincides with the 0.35

dielectric type which samples the RF energy reflected back by

usec pulse. A negative pulse is then present at the output of

the antenna. The VSWR is also detected and routed to the

the decoding gate and applied to pulse shaper A4A4. A4A4

comparator circuits.

generates a 0.2 usec pulse which is routed to the output

5-12. The comparator and power level detector circuit (A4)

NAND gate, A4A3B. The output from the power and frequency

measures and evaluates any change in the proportional

comparator (amplified by A4Qll and A4Q12) along with the

amplitudes of the input power, frequency, and VSWR. All

output from the VSWR and power comparator (amplified by

other factors remaining constant, if the power pulse amplitude

A4Q3 and A4Q4 and shaped by pulse shaper A4A6), are also

changes, both VSWR and frequency pulse amplitudes will

routed to the output NAND gate. The resulting pulse is routed

change proportionately. However, if the input power pulse

to output pulse shaper A4A5. The high output from A4A5 is

remains constant and either VSWR or frequency pulse

applied to another NAND gate (A4A3C, pin 3).

amplitude change as a result of being out of the bandpass, the

5-14. With a high input at the base of A3Q8 from A2A1A,

change will be measured and evaluated in the comparators.

A3Q8 is turned on. With A3Q8 energized, A3Q7 is now

The go, no-go evaluation for the comparator networks are: (1)

allowed to amplify and invert the test gate from A2A4. This

For the power and VSWR comparator (A4Q1. A4Q2), when

inverted gate is applied to the NAND gate in the comparator-

the power pulse amplitude exceeds the VSWR pulse

decoder module (A4A3C, pins 4, 5) along with the high output

amplitude, a go indication is present (comparator output

of A4A5 which is also located on the comparator-decoder

pulse). If VSWR exceeds power, a no-go indication is present

module (A4). The NAND gate allows only those transponder

(no comparator output pulse is present). The VSWR control,

replies which are synchronous with the interrogation pulse

A1Rl, sets the input level of the VSWR pulse amplitude. (2)

pairs generated in the mode generator to be evaluated. The

For the power and frequency comparator (A4Q9, A4Q10),

output of the NAND gate is now applied to the In-Flight test

when the power pulse amplitude exceeds the frequency pulse

evaluator. In-Flight test evaluator determines the average

amplitude, a no-go indication is present (no comparator

D.C. level of the input pulse repetition rate. If the input pulse

output). When the frequency pulse amplitude is greater than

repetition rate is 80 percent or greater of the internal

the power monitor pulse amplitude, a go indication is present

interrogation rate, the D.C. level at the integration network on

(comparator output). The output of the power monitor pulse

detector is also routed to the power level detector circuit. The

Change 3 5-3