Figure 5-42. ERD Card, Minor Frame Generation Diagnostic Circuits

T.O. 31W2-2GSC24-2

TM 11-5805-688-14-1

NAVELEX 0967-LP-545-3010

Figure 5-42. ERD Card, Minor Frame Generation Diagnostic Circuits - Block Diagram

U36 to the minor frame count output from U35. At this

causes the error up/down counter to count up and down

time, a count up (A=B) output is produced by U37.

as determined by the A=B output from U37. This

function ensures that the 5-bit minor frame counts being

5-552. A count up input enables AND gate U27-8 during

generated from U36 are synchronous with the minor

frame counts in the incoming overhead data. The error

word 28 when signal DEOS2B- is present and

up/down counter permits random no-compares to occur

increments the count in U20. Up/down counter U20 can

between the two minor frame counts compared in U37

be incremented for a maximum count of 15. At count 15,

without interrupting the data flow. Most random no-

AND gate U19-8 is enabled and produces an inhibit input

compares are caused by transient problems associated

to AND gate U27-8 as long as count 15 is in the counter.

with the incoming data pulses.

A random pattern of compares and no-compares in U37

5-149