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Page Title: Figure 5-35. VD Card - Block Diagram
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T.O. 31W2-2GSC24-2
TM 11-5805-688-14-1
NAVELEX 0967-LP-545-3011
Figure 5-35. VD Card - Block Diagram
This boost enable signal is generated to increase the
applied drive voltage and produces the reconstructed
drive voltage to the integrator circuit and achieve the
analog signal that is applied to a bandpass filter circuit.
response necessary to faithfully reproduce the analog
signal from the decoded digital pulses.
5-450.  When the decoder logic generates the boost
enable signal, the active negative or positive drive signal
5-449.  The slope control circuit generates the drive
applied to the integrator increases in amplitude to
voltage that determines the slope of the integrator output
produce a sharper slope for the drive signal applied to
signal. The negative drive voltage from the slope control
the integrator. The integrator output, in turn,  has a
is applied to an inverter and to the negative inhibit switch.
sharper  rising  or  falling  slope  that  enables  the
The inverted output from the inverter is applied as a
reconstructed analog signal voltage to increase at a
positive drive voltage to the positive inhibit switch. The
greater rate. Once the boost requirement is satisfied,
polarity of the bit 1 (one or zero) signal applied to the two
the boost enable output from the logic decoder output
switches determines which switch is enabled to apply
returns to its normal decreased drive state until the next
either the negative drive or the positive drive signal to the
series of three ones or zeros is applied 'from the 3-bit
integrator.  The integrator,  in turn,  responds to the
shift register.
5-119

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