|
|
T.O. 31W-2GSC24-2
TM 11-5805-688-14-1
NAVELEX 0967-LP-545-3011
(DRIO), are routed to the GC/DM card. Each 4-bit
5-118. The system clock distribution circuits generate
channel address applied to the GC/DM card causes one
system clock signals DRIO from system clock signal RI
gated clock signal to be generated to the channel card
from the FS card. Signals DRIO are routed as timing
identified in the channel address. The end-of-scan
signals to the seq and GC/DM cards. The end-of-scan
generation circuits generate complementary end-of-scan
7eneration circuits produce end-of-scan signal
signals DEOS and DEOS- that are applied to the OEG
DEOS3NX when word 29 signal DW29 from the GC/DM
and ERD cards. The signals are generated when the
card and end-of-scan signal DEOS from the seq card
port count in the sequencer timing circuits is equal to
are applied. Signal DEOS3NX is routed as a timing
the maximum number of used ports selected by the five
signal to the CRC circuit on the SB card(s).
PORTS IN USE switches. Complementary end-of-scan
signals DEOS2 and DEOS2- are derived from signal
5-119. GATED CLOCK/DATA MUX (GC/DM) CARD.
DEOS and the signals are applied to the FS card. In
turn, complementary end-of-scan signals DEOS2B and
5-120. The GC/DM card generates the gated clock
DEOS2B- are also derived from signal DEOS. These
signals that are applied to the channel cards in the
two signals are routed to the OEG, GC/DM, and ERD
demultiplexer. The card also generates the three stuff
cards. The overhead port sequence selector circuit
command codes and timing signals that are applied to
produces minor frame equals port sequence signal
the common cards in the demultiplexer as described in
DMF=PS during each minor frame period that is eligible
the following paragraphs. The gated clock generation
to provide overhead service to an assigned used port.
circuits produce gated clock signals (DGCO1 through
The signal is applied as an enable signal to the GC/DM
DGC15) as required to service the active channel cards.
card during word 29 to allow a positive or negative stuff
Each active channel card has a designated gated clock
to be performed. The five minor frame count signals,
signal. For example, channel card No. 1 receives signal
DMFCO through DMFC4, that are applied to the circuit
GCO1 each time a gated clock is designated to the
from the ERD card contain the minor frame number of a
channel card. Positive stuff enable signal DPSE applied
given minor frame being received in the demultiplexer at
to the circuits during word 29 causes one additional
any given time.
gated clock signal to be generated to a selected channel
card as part of the overhead service function. In turn,
5-116. OVERHEAD ENABLE GENERATOR (OEG)
negative stuff enable signal DNSE results in deletion of
one gated clock signal during word 29 to the selected
CARD.
channel card. Minor frame equals port sequence signal
DMF=PS applied to the circuits is an enable signal that
5-117. The OEG card generates timing signals that are
allows a positive or negative overhead service to be
used in the demultiplexer function.
The word 24
performed during word 29 of a given minor frame
generation circuits generate word 24 signal DW24NX
period. Signal DMF=PS is not generated during minor
when the word count in word count signals DWCO
frame periods that are not eligible to provide overhead
through DWC4 from the GC/DM card is count 23, and
servicing.
end-of-scan signal EOS is applied from the end-of-scan
generation circuits. Signal DW24NX is routed to the
CRC circuits on the SB card(s) as a timing signal.
5-28
|
Privacy Statement - Press Release - Copyright Information. - Contact Us |