MULTIPLEXER COMMON ELECTRONICS

T.O. 31W2-2GSC24-2

TM 11-5805-688-14-1

NAVELEX 0967-LP-545-3010

maximum input rate may be 9600 bps (paragraph 3-23).

on these procedures, the quantity of fill bits required is:

Since the 9600-bps input rate applied to channels 1 and

Fill bits = (899) (K) (1 - c)

3 exceeds the maximum TE input rate and KRp is not 3

x Rc, the TR processing mode is selected. Therefore, the

letters TR (timing recovery) are entered in the CARD

= (899) (1) (1 - 0.9583333)

TYPE TE/TR block for these two channels. Channels 4

and 5 process Type I data inputs, and therefore an X is

= 37.46

entered in the CARD TYPE RCB block for each channel

(paragraph 3-27). In the INTFC block for each channel,

= 37

an X is entered in either the 75 or 6K (ohms) block, as

appropriate, to match the channel source impedance for

Since this number is < 868, the conversion may be

the given installation under consideration. For example,

performed. As shown in table 3-3, the 10-digit binary

in figure 3-5, the INTFC block for channel 2 is not

number that must be used to cause the injection of 37 fill

marked since the voice input impedance of 600 ohms

bits is 0101010000 (LSB left) This number is then

(balanced) is fixed by channel card design. In the

entered in the RATE CONVERSION DATA block of the

example shown, the source impedance for all digital

worksheet (figure 3-5).

channel inputs is assumed to be 6K ohms. The

worksheet is completed upon entry of the multiplexer

output rate (Ro) value of 48000 in the OUTPUT RATE

3-36. MULTIPLEXER COMMON ELECTRONICS.

(Ro) BPS block, and entry of the number of the ports (K)

assigned to each channel into the PORTS K blocks.

3-37. Sheet 2 of the configuration worksheets (figure 3-

6) is prepared to enable setup of the cards in the

3-35. It should be noted that the input rate (Rc) of 2300

multiplexer common electronics section. The individual

bps for channel 5 is less than that channel's KRp of 2400

preparing the worksheet uses portions of the information

bps. In such a situation, coarse rate conversion to KRp

in figure 3-4, combined with a knowledge of the electrical

must be performed (paragraph 3-19).

To enable

interface cabling and termination arrangements that exist

conversion, a 10-digit binary number is computed and

within the facility in which the multiplexer set is installed.

entered on the worksheet. Normally, the computation is

performed as part of the actual multiplexer setup

3-38. In figure 3-4, the multiplexer output rate (Ro) is

process. However, as a convenience to the person

shown as 48.0 kbps; the value 48000 is therefore

setting up the multiplexer, it may be performed at the

entered in the OUTPUT RATE (Ro) BPS block of the

time the worksheet is prepared.

Computation

worksheet. Reference timing is supplied in the form of

procedures are prescribed in paragraph 3-69, steps 7

an external 3.072-MHz station clock. Therefore, an X is

and 8.The maximum number of fill bits that may be

entered in the SOURCE EXT block, and the value

inserted is 868 bits. A computed fill bit quantity greater

3072000 is entered in the EXT FREQ HZ block. All

than 868 is indicative of an attempted coarse rate

multiplexer set interface circuits are designed to provide

conversion that is beyond the capabilities of the

an input/output impedance of 6K ohms or 75 ohms. The

multiplexer

set.

Based

impedance that matches the station clock source should

be selected. For this example, it is assumed that 75

ohms is the proper match; therefore, an X is entered in

the INPUT INTFC 75 block.

3-12