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T.O. 31W-2GSC24-2
TM 11-5805-688-14-1
NAVELEX 0967-LP-545-3011
error counts from the FS card: three that are associated
5-121. The stuff code generation circuits produce the
with the positive stuff command codes; three that are
three stuff command codes that are applied to the FS
associated with the negative stuff command codes; and
card  as part of the frame synchronization  function.
three that are associated with the no-action command
End-of-scan signal DEOS2Bfrom the seq card is a timing
code. During word 28, only one set of error counts is
input to the circuits. During bit 0 of each word, one bit
monitored by the circuits. The set of three error counts
from each of the three stuff command codes is applied
monitored  is selected by positive and negative  stuff
to the FS card. When the demultiplexer has frame
command code signals DNSE and DPSE from the FS
synchronization, one of the three bits applied to the FS
card.  When signal  DNSE is applied, the error rate
card will compare with the equivalent bit in the incoming
detector circuits monitor the three bit  error counts
overhead message format during words 1 through 23.
associated with the negative stuff command codes. The
positive stuff command codes are monitored  when
5-122. The word generation circuits produce word count
signal DPSE is applied to the circuits.  When both
signals DWCO through
DWC4 to provide 5-bit
signals (DPSE and DNSE) are absent during a given
sequential word counts 1 through 29 to the OEG card.
minor
frame period, the three bit error
counts
Word signals DW28 and DW29 are also produced by
associated with the no-action  command codes are
the circuits. Word signals DW28 and DW29- are applied
monitored. When the number of errors identified in the
as timing signals to the ERD card and the FS card.
error counts exceeds a predetermined threshold count
Word signal DW29 is applied to the OEG card.
within a given period of time, link error rate signal LLER
is generated. Signal LLER causes the LINK ERROR
RATE indicator on the front panel to light. When the
5-123. ERROR RATE DETECTOR (ERD) CARD.
number of errors detected within a given period of time
decreases to a value that is less than the predetermined
5-124. The ERD card generates a timing signal and
threshold  count, signal LLER is removed and the
monitors the incoming serial data stream for errors to
indicator goes out.
establish confidence in the BCI of the incoming data.
The minor frame generation circuits produce minor
frame count signals DMFCO through DMFC4 that are
5-126. SMOOTHING BUFFER (SB) CARD.
applied to the seq card. The minor frame identified in
the signals is the same minor frame that is identified in
5-127. The SB card receives the high speed serial data
the incoming overhead message format  at any given
in the form of synchronous data (DTIX-) from the FS
time. Timing signals DW28, DW29-, and DEOS- are
card. The SB card function is basically the complement
used in the generation of the minor frame count signals.
of the RCB card function  performed in the far-end
Demultiplexer overhead data
signals DOD-, which
multiplexer. Each SB card demultiplexes one channel of
contain the minor frame count for the minor frame in a
data out of the high-speed serial  data stream and
given overhead message during a minor frame period,
converts the data into the original asynchronous data
are used to synchronize  the minor frame generation
format  (with timing) that was applied to the  far-end
circuits.
multiplexer. This card also demultiplexes data originally
processed into the far-end multiplexer by
5-125. The error rate detector circuits receive nine bit
5-29

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