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T.O. 31S5-4-308-l
TM 11-5805-663-14-13
NAVELEX 0967-464-0010
output of G16 (high) disables G14 which
The output of M6 is determined by the
removes BOLA-P.  BOLA-P (low) now disables
value of MPXA-P.  T h e o u t p u t d a t a o f
G18 which removes STRB-N. Clearing FF4
M5 is determined by the value of
disables G11, G15, and G16, clears FF5,
BOLA-P.
and enables G7.
5 - 5 7 2 .  If DONE-N is not received within
5-577. When the Mag Tape Controller is
2 usec after STRB-N goes low, the Bus
slaved to read the data from the Formatter
Controller generates QUIT-N. Inverter I5
function, MPXA-P, MPXB-P, and BOLA-P
inverts QUIT-N which activates G17 (G17
are low.  Ml through M4 couple the 1CO
enabled by BOLA-P during the normal cycle}.
and 2C0 inputs to the Yl and Y2 outputs,
The output of G17 clears FF3 and FF4, and
respectively.  M5 and M6 couple the 1A
activates G13 which resets FFl. Inverter
through 4A inputs to the Yl through Y4 out-
I6 inverts the output of I5 which disables
puts, respectively.  This condition couples
G9 to allow G15 to clear FF4.
the data from the input data register, RROO-N
through RR15-N, to the data output and con-
MAG TAPE CONTROLLER A1A3A14
trol register circuit (DOOA-N through DlSA-N).
DATA INPUT AND SELECTOR CIRCUIT.
5-578.  When the Mag Tape Controller is
5-1574.  General.
The Mag Tape Controller
slaved to read the Mag Tape Controller con-
data input and selector circuit stores data
trol register data from the Mag Tape Con-
r e c e i v e d f r o m t h e F o r m a t t e r f u n c t i o n .  The
troller data output and control register cir-
Mag Tape Controller data input and selector
cuit, the Mag Tape Controller address re-
circuit also selects the data to be placed
ceivers and recognition circuit generates
on the INFIBUS.
MPXB-P (MPXA-P and BOLA-P low). Ml
through M4 couples the lC2 and 2C2 inputs
5 - 5 7 5 .  Detail Analysis (see figure 81).
to the Yl and Y2 outputs, respectively. M5
When the Mag Tape Controller performs
and M6 couple the 1A through 4A inputs to
a read operation with the Formatter func-
the Yl through Y4 outputs, respectively.
tion, the Formatter function generates
This condition couples the control register
data, IDOO-P through ID07-P, and IDSB-N
data, CROO-N through CR05-N, to the Mag
ID07-P are routed to input data register
Tape Controller data output and control
U67 and IDSB-N triggers single-shot SSl.
register circuit.
SS1 remains set for 3 usec. After 3 usec
the 0 output of SSl (waveform B, figure 82)
5-579.  When the Mag Tape Controller is
triggers single-shot SS2. SS2 generates
slaved to read out the status data, the Mag
RDST-P (waveform C, figure 82) and RDST-N
Tape Controller address receivers and re-
(waveform D, figure 82), for 1 usec. RDST-N
cognition circuit generates MPXA-P
triggers and loads input data register U67
(MPXB-P and BOLA-P low). Ml through M4
with IDOO-P through ID07-P. Also, RDSP-P
couples the 1C1 and 2C1 inputs to the Yl
an:! RDST-K are routed to the May Tape
and Y2 outputs, respectively.  M5 couples
Controller read/write control status circuit.
the 1A through 4A inputs to the Yl through
input data registers UG7 and U77 generate
Y4 outputs, r e s p e c t i v e l y .  T h i s c o n d i t i o n
RROO-N t h r o u g h R R 1 5 - N , a n d S T S 5 - N t h r o u g h
couples the Maq Tape Controller status
S T S 8 - N which  are  routed  to  data
selectors
data,
WDNB-N,
RDNA-N,
RTER-N,
and
M1 through M6 for selection.
PDSA-N, and Formatter function status data,
N D E - N , D R E - N , STS1-N,
and
STS2-N
5 - 5 7 6 .  All data to be placed on true INFI-
to the Mag Tape Controller data output and
BUS data lines is first selected `by the data
control register circuit.
s e l e c t o r s M1  through  M6.  M1  through  M4
are dual four-line to one-line selectors
whose output data is determined by the value
of MPXA-P and MPXB-P. M5 and M6 are
each quad two-line to one-line selectors.

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